From 0d8afbe7ad79b031da61c710911aee9a7cf54cbb Mon Sep 17 00:00:00 2001 From: tierno Date: Tue, 22 Nov 2016 11:35:41 +0100 Subject: [PATCH] Allow compute nodes without hugepages Signed-off-by: tierno --- httpserver.py | 1 - vim_schema.py | 4 ++-- 2 files changed, 2 insertions(+), 3 deletions(-) diff --git a/httpserver.py b/httpserver.py index 870d680..9f26737 100644 --- a/httpserver.py +++ b/httpserver.py @@ -599,7 +599,6 @@ def http_post_hosts(): sriov['source_name'] = index index += 1 interfaces.append ({'pci':str(port_k), 'Mbps': port_v['speed']/1000000, 'sriovs': new_sriovs, 'mac':port_v['mac'], 'source_name':port_v['source_name']}) - #@TODO LA memoria devuelta por el RAD es incorrecta, almenos para IVY1, NFV100 memory=node['memory']['node_size'] / (1024*1024*1024) #memory=get_next_2pow(node['memory']['hugepage_nr']) host['numas'].append( {'numa_socket': node['id'], 'hugepages': node['memory']['hugepage_nr'], 'memory':memory, 'interfaces': interfaces, 'cores': cores } ) diff --git a/vim_schema.py b/vim_schema.py index 1a75dde..0a5929d 100644 --- a/vim_schema.py +++ b/vim_schema.py @@ -273,7 +273,7 @@ host_data_schema={ "type": "object", "properties":{ "admin_state_up":{"type":"boolean"}, - "hugepages":integer1_schema, + "hugepages":integer0_schema, "cores":{ "type": "array", "minItems":2, @@ -324,7 +324,7 @@ host_data_schema={ "memory":integer1_schema }, "additionalProperties": False, - "required": ["hugepages","cores","numa_socket"] + "required": ["cores","numa_socket"] } } }, -- 2.25.1